The ever growing demand of high data rates in mobile communication systems calls for methods which allow to use the radio frequency spectrum as efficiently as possible. Future mobile communication systems most likely will involve multiple-input multiple-output (MIMO) techniques in combination with high order constellations, raising the amount of transmitted data per channel usage in order to enhance spectral efficiency. However, due to non-orthogonality of the transmission channel, this performance improvement comes at the cost of increased computational complexity in the receiver. One of the main challenge is the computationally intense task of MIMO detection use to separate the spatially multiplexed data streams.
Motivated by the tremendous gains in turbo channel decoder, the concept of iterative processing has been recently extended to include iterations between MIMO detector and channel decoder. Soft-In Soft-Out (SISO) detectors, when concatenated with a channel decoder, can significantly improve the quality of wireless transmission by performing joint, iterative data detection and channel decoding through the exchange of soft information. However, soft information from channel decoder increases the search space and hereby the computational complexity of the tree search in SISO detector. Furthermore, the complexity of the optimal MAP detector grows exponentially with system dimensions. These considerations motivate the design of complexity reduced suboptimal detectors for iterative detection and decoding.
This thesis focuses on complexity reduction of the SISO detector at minimum performance loss and to enable high throughput detection. Detection algorithms based on depth first tree search enables MAP detection performance at reduced but still high complexity. This thesis introduces a noval method for complexity reduction of depth first search detector. Based on the analysis of the reliability information form channel decoder, predefinition of the bits values is enabled. This allows to reduce the search space and thereby ease the complexity of detector. In addition to this, parallel processing has been exploited in the target detection algorithm to speed up the detection and increase throughput. In order to evaluate the performance and complexity of hardware implementation, this thesis includes VLSI implementation of the processor model for soft-out MIMO detection. Synthesis results show that it is possible to achieve a high throughput compared to state of the art implementations with relatively small chip area. Final evaluation of the SISO detector is performed in a case study on MIMO detection for 3GPP LTE system.